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1 architecture, 2 uart/lin pins, 1 architecture -4 – Maxim Integrated MAXQ7667 User Manual

Page 134: 2 uart/lin pins -4, Figure 8-1. uart/lin block diagram -4, Table 8-1. gpio port 0 uart/lin pins -4, Maxq7667 user’s guide, Table 8-1. gpio port 0 uart/lin pins

1 architecture, 2 uart/lin pins, 1 architecture -4 | 2 uart/lin pins -4, Figure 8-1. uart/lin block diagram -4, Table 8-1. gpio port 0 uart/lin pins -4, Maxq7667 user’s guide, Table 8-1. gpio port 0 uart/lin pins | Maxim Integrated MAXQ7667 User Manual | Page 134 / 347 1 architecture, 2 uart/lin pins, 1 architecture -4 | 2 uart/lin pins -4, Figure 8-1. uart/lin block diagram -4, Table 8-1. gpio port 0 uart/lin pins -4, Maxq7667 user’s guide, Table 8-1. gpio port 0 uart/lin pins | Maxim Integrated MAXQ7667 User Manual | Page 134 / 347
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