Renesas H8S/2111B - Manual (Page 68)

Rev. 1.00, 05/04, page 34 of 544
Table 2.5 Logic Operations Instructions
Instruction Size * Function
AND B/W/L Rd
∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
OR B/W/L Rd
∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
XOR B/W/L Rd
⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
NOT B/W/L
∼ Rd → Rd
Takes the one's complement (logical complement) of data in a
general register.
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Table 2.6 Shift Instructions
Instruction Size * Function
SHAL
SHAR
B/W/L Rd (shift)
→ Rd
Performs an arithmetic shift on data in a general register. 1-bit or 2
bit shift is possible.
SHLL
SHLR
B/W/L Rd (shift)
→ Rd
Performs a logical shift on data in a general register. 1-bit or 2 bit
shift is possible.
ROTL
ROTR
B/W/L Rd (rotate)
→ Rd
Rotates data in a general register. 1-bit or 2 bit rotation is possible.
ROTXL
ROTXR
B/W/L Rd (rotate)
→ Rd
Rotates data including the carry flag in a general register. 1-bit or 2
bit rotation is possible.
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword