Renesas H8S/2111B User Manual
Page 17
Rev. 1.00, 05/04, page xvii of xxxiv
12.8.6
SCI Operations during Mode Transitions ............................................................ 273
12.8.7
Switching from SCK Pins to Port Pins ................................................................ 276
Section 13 I
2
C Bus Interface (IIC) .....................................................................277
13.1
Features............................................................................................................................. 277
13.2
Input/Output Pins .............................................................................................................. 280
13.3
Register Descriptions ........................................................................................................ 281
13.3.1
I
2
C Bus Data Register (ICDR) ............................................................................. 282
13.3.2
Slave Address Register (SAR)............................................................................. 283
13.3.3
Second Slave Address Register (SARX) ............................................................. 284
13.3.4
I
2
C Bus Mode Register (ICMR)........................................................................... 286
13.3.5
I
2
C Bus Control Register (ICCR)......................................................................... 289
13.3.6
I
2
C Bus Status Register (ICSR)............................................................................ 297
13.3.7
DDC Switch Register (DDCSWR) ...................................................................... 301
13.3.8
I
2
C Bus Extended Control Register (ICXR)......................................................... 302
13.3.9
Port G Control Register (PGCTL) ....................................................................... 306
13.4
Operation .......................................................................................................................... 307
13.4.1
I
2
C Bus Data Format ............................................................................................ 307
13.4.2
Initialization ......................................................................................................... 309
13.4.3
Master Transmit Operation .................................................................................. 309
13.4.4
Master Receive Operation.................................................................................... 314
13.4.5
Slave Receive Operation...................................................................................... 321
13.4.6
Slave Transmit Operation .................................................................................... 328
13.4.7
IRIC Setting Timing and SCL Control ................................................................ 331
13.4.8
Noise Canceller.................................................................................................... 334
13.4.9
Initialization of Internal State .............................................................................. 335
13.5
Interrupt Sources............................................................................................................... 336
13.6
Usage Notes ...................................................................................................................... 337
13.6.1
Module Stop Mode Setting .................................................................................. 347
Section 14 Keyboard Buffer Controller.............................................................349
14.1
Features............................................................................................................................. 349
14.2
Input/Output Pins .............................................................................................................. 350
14.3
Register Descriptions ........................................................................................................ 351
14.3.1
Keyboard Control Register H (KBCRH) ............................................................. 351
14.3.2
Keyboard Control Register L (KBCRL) .............................................................. 353
14.3.3
Keyboard Data Buffer Register (KBBR) ............................................................. 354
14.4
Operation .......................................................................................................................... 355
14.4.1
Receive Operation................................................................................................ 355
14.4.2
Transmit Operation .............................................................................................. 356
14.4.3
Receive Abort ...................................................................................................... 359
14.4.4
KCLKI and KDI Read Timing............................................................................. 361
14.4.5
KCLKO and KDO Write Timing......................................................................... 361