Renesas H8S/2111B - Manual (Page 366)

Rev. 1.00, 05/04, page 332 of 544
SCL
SDA
IRIC
User processing
Clear IRIC
2 1 3 A 8
1 2 3 9 8
Clear IRIC
When WAIT = 1, and FS = 0 or FSX = 0 (I 2 C bus format, wait inserted)
SCL
SDA
IRIC
User processing
Clear IRIC Write to ICDR (transmit)
or read from ICDR (receive)
1 A 8
1 9 8
Clear IRIC
(a) Data transfer ends with ICDRE=0 at transmission, or ICDRF=0 at reception.
(b) Data transfer ends with ICDRE=1 at transmission, or ICDRF=1 at reception.
Figure 13.26 IRIC Setting Timing and SCL Control (2)