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2 lpc i/o cycles – Renesas H8S/2111B User Manual

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Rev. 1.00, 05/04, page 397 of 544

15.4.2

LPC I/O Cycles

There are ten kinds of LPC transfer cycle: memory read, memory write, I/O read, I/O write, DMA
read, DMA write, bus master memory read, bus master memory write, bus master I/O read, and
bus master I/O write. Of these, the chip's LPC supports only I/O read and I/O write cycles.

An LPC transfer cycle is started when the

LFRAME signal goes low in the bus idle state. If the

LFRAME signal goes low when the bus is not idle, this means that a forced termination (abort) of
the LPC transfer cycle has been requested.

In an I/O read cycle or I/O write cycle, transfer is carried out using LAD3 to LAD0 in the
following order, in synchronization with LCLK. The host can be made to wait by sending back a
value other than B

′0000 in the slave's synchronization return cycle, but with the chip's LPC a

value of B

′0000 is always returned.

If the received address matches the host address in an LPC register (IDR, ODR, STR, TWR), the
host interface enters the busy state; it returns to the idle state by output of a state count 12
turnaround. Register and flag changes are made at this timing, so in the event of a transfer cycle
forced termination (abort) before state #12, registers and flags are not changed.

I/O Read Cycle

I/O Write Cycle

State
Count Contents

Drive
Source

Value
(3 to 0)

Contents

Drive
Source

Value
(3 to 0)

1 Start

Host

0000 Start

Host

0000

2

Cycle type/direction Host

0000

Cycle type/direction Host

0010

3

Address 1

Host

Bits 15 to
12

Address 1

Host

Bits 15 to
12

4

Address 2

Host

Bits 11 to 8

Address 2

Host

Bits 11 to 8

5

Address 3

Host

Bits 7 to 4

Address 3

Host

Bits 7 to 4

6

Address 4

Host

Bits 3 to 0

Address 4

Host

Bits 3 to 0

7 Turnaround

(recovery)

Host

1111

Data 1

Host

Bits 3 to 0

8

Turnaround

None

ZZZZ

Data 2

Host

Bits 7 to 4

9 Synchronization

Slave

0000 Turnaround

(recovery)

Host 1111

10

Data 1

Slave

Bits 3 to 0

Turnaround

None

ZZZZ

11

Data 2

Slave

Bits 7 to 4

Synchronization

Slave

0000

12 Turnaround

(recovery)

Slave 1111

Turnaround
(recovery)

Slave 1111

13 Turnaround

None

ZZZZ Turnaround

None

ZZZZ

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