Renesas H8S/2111B - Manual (Page 178)

Rev. 1.00, 05/04, page 144 of 544
7.14.4 Pin Functions
• PG7/ExSCLB
The pin function is switched as shown below according to the combination of the IIC1BS and
the IIC0BS bits in PGCTL of the IIC* and the PG7DDR bit.
IIC1BS and IIC0BS* All 0 Not all 0
PG7DDR 0 1 —
Pin Function PG7 input pin PG7 output pin ExSCLB I/O pin*
Note: * The program development tool (emulator) does not support this function. The output
type of ExSCLB is NMOS open-drain output and this pin has direct bus drive capability.
• PG6/ExSDAB
The pin function is switched as shown below according to the combination of the IIC1BS and
the IIC0BS bits in PGCTL of the IIC* and the PG6DDR bit.
IIC1BS and IIC0BS* All 0 Not all 0
PG6DDR 0 1 —
Pin Function PG6 input pin PG6 output pin ExSDAB I/O pin*
Note: * The program development tool (emulator) does not support this function. The output
type of ExSDAB is NMOS open-drain output and this pin has direct bus drive capability.
• PG5/ExSCLA
The pin function is switched as shown below according to the combination of the IIC1AS and
the IIC0AS bits in PGCTL of the IIC* and the PG5DDR bit.
IIC1AS and IIC0AS* All 0 Not all 0
PG5DDR 0 1 —
Pin Function PG5 input pin PG5 output pin ExSCLA I/O pin*
Note: * The program development tool (emulator) does not support this function. The output
type of ExSCLA is NMOS open-drain output and this pin has direct bus drive capability.
• PG4/ExSDAA
The pin function is switched as shown below according to the combination of the IIC1AS and
the IIC0AS bits in PGCTL of the IIC* and the PG4DDR bit.
IIC1AS and IIC0AS* All 0 Not all 0
PG4DDR 0 1 —
Pin Function PG4 input pin PG4 output pin ExSDAA I/O pin*
Note: * The program development tool (emulator) does not support this function. The output
type of ExSDAA is NMOS open-drain output and this pin has direct bus drive capability.