Renesas H8S/2111B - Manual (Page 262)

Rev. 1.00, 05/04, page 228 of 544
TCNT value
H'00 Time
H'FF
WT/ IT = 1
TME = 1
Write H'00 to
TCNT WT/ IT = 1
TME = 1
Write H'00 to
TCNT
518 system clocks
Internal reset signal
[Legend]
WT/
IT:
TME:
OVF:
Overflow
OVF = 1*
Timer mode select bit
Timer enable bit
Overflow flag
Note: * After the OVF bit becomes 1, it is cleared to 0 by an internal reset.
The XRST bit is also cleared to 0.
RESO signal
132 system clocks
RESO and internal
reset signals generated
Figure 11.2 Watchdog Timer Mode (RST/
NMI = 1) Operation