Renesas H8S/2111B - Manual (Page 163)

Rev. 1.00, 05/04, page 129 of 544
7.11 Port B
Port B is an 8-bit I/O port. Port B pins also have LPC input/output pins, and wakeup event
interrupt input pins function. Port B has the following registers.
• Port B data direction register (PBDDR)
• Port B output data register (PBODR)
• Port B input data register (PBPIN)
7.11.1 Port B Data Direction Register (PBDDR)
PBDDR specifies input or output for the pins of port B on a bit-by-bit basis.
Bit Bit Name
Initial
Value R/W Description
7 PB7DDR 0 W
6 PB6DDR 0 W
5 PB5DDR 0 W
4 PB4DDR 0 W
3 PB3DDR 0 W
2 PB2DDR 0 W
1 PB1DDR 0 W
0 PB0DDR 0 W
PBDDR has the same address as P7PIN, and if read,
the port 7 pin states will be returned.
A port B pin becomes an output port if the
corresponding PBDDR bit is set to 1, and an input port
if the bit is cleared to 0.
7.11.2 Port B Output Data Register (PBODR)
PBODR stores output data for port B.
Bit Bit Name
Initial
Value R/W Description
7 PB7ODR 0 R/W
6 PB6ODR 0 R/W
5 PB5ODR 0 R/W
4 PB4ODR 0 R/W
3 PB3ODR 0 R/W
2 PB2ODR 0 R/W
1 PB1ODR 0 R/W
0 PB0ODR 0 R/W
PBODR can always be read or written to, regardless of
the contents of PBDDR.