Renesas H8S/2111B - Manual (Page 234)

Rev. 1.00, 05/04, page 200 of 544
TCSR_B
Bit Bit Name
Initial
Value R/W Description
7 CMFB 0 R/(W)* Compare-Match Flag B
[Setting condition]
When the values of TCNT_B and TCORB_B match
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB
6 CMFA 0 R/(W)* Compare-Match Flag A
[Setting condition]
When the values of TCNT_B and TCORA_B match
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA
5 OVF 0 R/(W)* Timer Overflow Flag
[Setting condition]
When TCNT_B overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
4 ICIE 0 R/W Input Capture Interrupt Enable
Enables or disables the ICF interrupt request (ICIA)
when the ICF bit in TCSR_A is set to 1.
0: ICF interrupt request (ICIA) is disabled
1: ICF interrupt request (ICIA) is enabled
3
2
OS3
OS2
0
0
R/W
R/W
Output Select 3, 2
These bits specify how the TMOB pin output level is to
be changed by compare-match B of TCORB_B and
TCNT_B.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
1
0
OS1
OS0
0
0
R/W
R/W
Output Select 1, 0
These bits specify how the TMOB pin output level is to
be changed by compare-match A of TCORA_B and
TCNT_B.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Notes: * Only 0 can be written, for flag clearing.