H3C Technologies H3C MSR 50 User Manual
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Item Description
TDM Clock Source
•
Internal—Set the internal crystal oscillator time division multiplexing (TDM) clock
as the TDM clock source on the E1 interface. After that, the E1 interface obtains
clock from the crystal oscillator on the main board. If it fails to do that, the
interface obtains clock from the crystal oscillator on its E1 card. Because SIC
cards are not available with crystal oscillator clocks, E1 interfaces on SIC cards
can only obtain clock from the main board. The internal clock source is also called
master clock mode in some features.
•
Line—Set the line TDM clock as the TDM clock source on the E1 interface. After
that, the E1 interface obtains clock from the remote device through the line. The
line clock source is also called slave clock mode in some features.
•
Line primary—Set the E1 interface to preferably use the line TDM clock as the
TDM clock source. After that, the E1 interface always attempts to use the line TDM
clock before any other clock sources.
By default, the TDM clock source for an E1 interface is the internal clock.
When digital voice E1 interfaces perform TDM timeslot interchange, it is important
for them to achieve clock synchronization to prevent frame slips and bit errors.
Depending on your configurations on E1 interfaces at the CLI, the system adopts
different clocking approaches. When there is a subcard VCPM on the main board,
the clock distribution principle is as follows:
•
If the line keyword is specified for all interfaces, the clock on the interface with the
lowest number is adopted. In case the interface goes down, the clock on the
interface with the second lowest number is adopted.
•
If line primary is specified for interface X and line or internal is specified for other
interfaces, the clock on interface X is adopted.
•
If line is specified for interface X and internal is specified for other interfaces, the
clock on interface X is adopted.
•
Generally, you cannot set the clock source for all interfaces in a system as internal
to prevent frame slips and bit errors. However, you can do this if the remote E1
interfaces adopt the line clock source.
When there is no VCPM on the main board, the configuration of each MIM/FIC is
independent but only one interface can be set as line primary.
Status
•
Enable—Enable the E1 interface.
•
Disable—Disable the E1 interface.
If you select the PRI Trunk Signaling option, the page as shown in
appears.