beautypg.com

Chapter 4 – Texas Instruments MSP430x1xx User Manual

Page 53

background image

4-1

Memory

Memory

MSP430 devices are configured as a von-Neumann architecture. It has code
memory, data memory, and peripherals in one address space. As a result, the
same instructions are used for code, data, or peripheral accesses. Also, code
may be executed from RAM.

Topic

Page

4.1

Introduction

4-2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2

Data in the Memory

4-3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3

Internal ROM Organization

4-4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.4

RAM and Peripheral Organization

4-6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 4