Texas Instruments MSP430x1xx - Manual (Page 325)

ADC12 Control Registers
15-35
ADC12
15.8.2 Conversion-Memory Registers ADC12MEMx
There are sixteen conversion-memory registers ADC12MEMx as follows:
0
rw rw r0 r0 rw rw
0140h...015Eh
ADC12MEM
15 12 11
r0 r0 rw rw rw rw rw rw rw rw
MSB LSB 0 0 0 0
ADC12MEM0,
to
ADC12MEM15 bits
0–15 Conversion results. The 12-bit conversion results are right-justified and
the four MSBs are always read as 0.
The ADC12OV interrupt flag will be set in time to indicate that a overflow
situation occurred. Software can detect it if it reads the conversion result
and then tests for overflow condition. The corresponding interrupt flag
is reset if ADC12MEMx is accessed.
Warning : SOFTWARE WRITE TO REGISTER ADC12MEMx
TYPICALLY, SOFTWARE SHOULD NOT WRITE TO THE CONVERSION
RESULT REGISTERS ADC12MEMX. IF SOFTWARE WRITES TO ONE OF
THESE REGISTERS WHILE THE ADC12 IS ATTEMPTING TO WRITE TO
THE SAME REGISTER, THE DATA IN THE REGISTER WILL BE
UNPREDICTABLE. IF SOFTWARE ENSURES THAT IT IS WRITING TO A
CONVERSION RESULT REGISTER THAT IS NOT BEING ACCESSED BY
THE ADC12, THEN THE WRITE COMPLETES NORMALLY AND THE DATA
IS WRITTEN CORRECTLY. THE ASSOCIATED INTERRUPT FLAG IS
RESET.
15.8.3 Control Registers ADC12MCTLx
Each conversion-memory register ADC12MEMx has its own control register
ADC12CTLx. The conversion-memory registers hold the conversion results,
and the control register for each conversion-memory register selects basic
conversion conditions such as selecting the analog channel, the reference
voltage sources for V
R+
and V
R–
, and indicating the end of a sequence.
All control bits in ADC12CTLx are reset during POR (see Chapter 3 for POR
details). The control registers ADC12MCTL.x can be modified only if the en-
able conversion control bit ENC is reset. Any instruction that writes to an
ADC12MCTL register while the ENC bit is set will have no effect.