Texas Instruments MSP430x1xx - Manual (Page 261)

Control and Status Registers
13-15
USART Peripheral Interface, SPI Mode
13.5 Control and Status Registers
The USART registers, shown in Tables 13–2 and 13–3, are byte structured and
should be accessed using byte instructions.
Table 13–2.USART0 Control and Status Registers
Register
Short
Form Register
Type
Address Initial State
USART control UCTL0 Read/write 070h See Section 13.5.1
Transmit control UTCTL0 Read/write 071h See Section 13.5.2
Receive control URCTL0 Read/write 072h See Section 13.5.3
Modulation control UMCTL0 Read/write 073h Unchanged
Baud rate 0 UBR00 Read/write 074h Unchanged
Baud rate 1 UBR10 Read/write 075h Unchanged
Receive buffer URXBUF0 Read/write 076h Unchanged
Transmit buffer UTXBUF0 Read 077h Unchanged
Table 13–3.USART1 Control and Status Registers
Register
Short
Form Register
Type
Address Initial State
USART control UCTL1 Read/write 078h See Section 13.5.1
Transmit control UTCTL1 Read/write 079h See Section 13.5.2
Receive control URCTL1 Read/write 07Ah See Section 13.5.3
Modulation control UMCTL1 Read/write 07Bh Unchanged
Baud rate 0 UBR01 Read/write 07Ch Unchanged
Baud rate 1 UBR11 Read/write 07Dh Unchanged
Receive buffer URXBUF1 Read/write 07Eh Unchanged
Transmit buffer UTXBUF1 Read 07Fh Unchanged
All bits are random following the PUC signal, unless otherwise noted by the
detailed functional description.
Reset of the USART module is performed by the PUC signal or a SWRST. After
a PUC signal, the SWRST bit remains set and the USART module remains in
the reset condition. It is disabled by resetting the SWRST bit. The SPI mode
is disabled after the PUC signal.
The USART module operates in asynchronous or synchronous mode as
defined by the SYNC bit. The bits in the control registers can have different
functions in the two modes. All bits are described with their function in the
synchronous mode—SYNC = 1. Their function in the asynchronous mode is
described in Chapter 12.