Texas Instruments MSP430x1xx User Manual

Page 240

Utilizing Features of Low-Power Modes

12-24

**********************************************************
* Interrupt handler for frame start condition and *
* Character receive *

**********************************************************

IFG2

.EQU

; URXIFG and UTXIFG in
; address 3

UTCTL

.EQU

71h

;

UTXIFG

.EQU

;

URXSE

.EQU

;
;

URX_Int

BIT.B #URXIFG,&IFG2

; test URXIFG signal to

JNE

ST_COND

; check if frame start
; condition

.....
.....

ST_COND

BIC.B #URXSE,&UTCTL

; clear ff/signal URXS,
; stop further interrupt
; requests

BIS.B #URXSE,&UTCTl

; Prepare FF_URXS for next
; frame start bits and set

.....

; the conditions to run the

.....

; clock needed for UART RX

Note:

Break Detect (BRK) Bit With Halted UART Clock

If the UART operates with the wake-up-on-start-condition mode and
switches off the UCLK whenever a character is completely received, a com-
munication line break cannot be detected automatically by the UART hard-
ware. The break detection requires the baud-rate generator BRSCLK, but it
is stopped upon the missing UCLK.

12.6.2 Maximum Utilization of Clock Frequency vs Baud Rate UART Mode

The current consumption increases linearly with the clock frequency. It should
be kept to the minimum required to meet application conditions. Fast
communication speed is needed for calibration and testing in manufacturing
processes, alarm responses in critical applications, and response time to
human requests for information.

The MSP430 USART can generate baud rates up to one third of the clock
frequency. An additional modulation of the baud-rate timing adjusts timing for
individual bits within a frame. The timing is adjusted from bit to bit to meet
timing requirements even when a noninteger division is needed. Baud rates
up to 4800 baud can be generated from a 32,768 Hz crystal with maximum
errors of 11 percent. Standard UARTs—even with the worst maximum error
(–14.6 percent)—can obtain maximum baud rates of 75 baud.