Texas Instruments MSP430x4xx User Manual

User’s guide, Msp430x4xx family

Table of contents

Document Outline

MSP430x4xx - SLAU056E
IMPORTANT NOTICE
Read This First
- About This Manual
- Related Documentation From Texas Instruments
- FCC Warning
- Notational Conventions
- Glossary
- Register Bit Conventions
Contents
Chapter 1: Introduction
- 1.1 Architecture
- 1.2 Flexible Clock System
- 1.3 Embedded Emulation
- 1.4 Address Space
Chapter 2: System Resets, Interrupts, and Operating Modes
- 2.1 System Reset and Initialization
  - 2.1.1 Brownout Reset (BOR)
  - 2.1.2 Device Initial Conditions After System Reset
    - Software Initialization
- 2.2 Interrupts
- 2.3 Operating Modes
  - 2.3.1 Entering and Exiting Low-Power Modes
    - Extended Time in Low-Power Modes
- 2.4 Principles for Low-Power Applications
- 2.5 Connection of Unused Pins
Chapter 3: RISC 16-Bit CPU
- 3.1 CPU Introduction
- 3.2 CPU Registers
- 3.3 Addressing Modes
- 3.4 Instruction Set
Chapter 4: FLL+ Clock Module
- 4.1 FLL+ Clock Module Introduction
- 4.2 FLL+ Clock Module Operation
- 4.3 FLL+ Clock Module Registers
Chapter 5: Flash Memory Controller
- 5.1 Flash Memory Introduction
- 5.2 Flash Memory Segmentation
- 5.3 Flash Memory Operation
- 5.4 Flash Memory Registers
Chapter 6: Supply Voltage Supervisor
- 6.1 SVS Introduction
- 6.2 SVS Operation
- 6.3 SVS Registers
  - SVSCTL, SVS Control Register
Chapter 7: Hardware Multiplier
- 7.1 Hardware Multiplier Introduction
- 7.2 Hardware Multiplier Operation
- 7.3 Hardware Multiplier Registers
Chapter 8: DMA Controller
- 8.1 DMA Introduction
- 8.2 DMA Operation
- 8.3 DMA Registers
Chapter 9: Digital I/O
- 9.1 Digital I/O Introduction
- 9.2 Digital I/O Operation
- 9.3 Digital I/O Registers
Chapter 10: Watchdog Timer, Watchdog Timer+
- 10.1 Watchdog Timer Introduction
- 10.2 Watchdog Timer Operation
- 10.3 Watchdog Timer Registers
Chapter 11: Basic Timer1
- 11.1 Basic Timer1 Introduction
- 11.2 Basic Timer1 Operation
- 11.3 Basic Timer1 Registers
Chapter 12: Timer_A
- 12.1 Timer_A Introduction
- 12.2 Timer_A Operation
- 12.3 Timer_A Registers
Chapter 13: Timer_B
- 13.1 Timer_B Introduction
  - 13.1.1 Similarities and Differences From Timer_A
- 13.2 Timer_B Operation
- 13.3 Timer_B Registers
Chapter 14: USART Peripheral Interface, UART Mode
- 14.1 USART Introduction: UART Mode
- 14.2 USART Operation: UART Mode
- 14.3 USART Registers: UART Mode
Chapter 15: UASRT Peripheral Interface, SPI Mode
- 15.1 USART Introduction: SPI Mode
- 15.2 USART Operation: SPI Mode
- 15.3 USART Registers: SPI Mode
Chapter 16: OA
- 16.1 OA Introduction
- 16.2 OA Operation
- 16.3 OA Registers
  - OAxCTL0, Opamp Control Register 0
  - OAxCTL1, Opamp Control Register 1
Chapter 17: Comparator_A
- 17.1 Comparator_A Introduction
- 17.2 Comparator_A Operation
- 17.3 Comparator_A Registers
Chapter 18: LCD Controller
- 18.1 LCD Controller Introduction
- 18.2 LCD Controller Operation
- 18.3 LCD Controller Registers
  - LCDCTL, LCD Control Register
Chapter 19: LCD_A Controller
- 19.1 LCD_A Controller Introduction
- 19.2 LCD_A Controller Operation
- 19.3 LCD Controller Registers
Chapter 20: ADC12
- 20.1 ADC12 Introduction
- 20.2 ADC12 Operation
- 20.3 ADC12 Registers
Chapter 21: SD16
- 21.1 SD16 Introduction
- 21.2 SD16 Operation
- 21.3 SD16 Registers
Chapter 22: SD16_A
- 22.1 SD16_A Introduction
- 22.2 SD16_A Operation
- 22.3 SD16_A Registers
Chapter 23: DAC12
- 23.1 DAC12 Introduction
- 23.2 DAC12 Operation
- 23.3 DAC12 Registers
  - DAC12_xCTL, DAC12 Control Register
  - DAC12_xDAT, DAC12 Data Register
Chapter 24: Scan IF
- 24.1 Scan IF Introduction
- 24.2 Scan IF Operation
- 24.3 Scan IF Registers