Introduction, Chapter 1 – Texas Instruments MSP430x1xx User Manual
Page 23

1-1
Introduction
Introduction
This chapter outlines the features and capabilities of the Texas Instruments
(TI
) MSP430x1xx family of microcontrollers.
The MSP430 employs a von-Neumann architecture, therefore, all memory
and peripherals are in one address space.
The MSP430 devices constitute a family of ultralow-power, 16-bit RISC
microcontrollers with an advanced architecture and rich peripheral set. The
architecture uses advanced timing and design features, as well as a highly
orthogonal structure to deliver a processor that is both powerful and flexible.
The MSP430 consumes less than 400
µ
A in active mode operating at 1 MHz
in a typical 3-V system and can wake up from a <2-
µ
A standby mode to fully
synchronized operation in less than 6
µ
s. These exceptionally low current
requirements, combined with the fast wake-up time, enable a user to build a
system with minimum current consumption and maximum battery life.
Additionally, the MSP430x1xx family has an abundant mix of peripherals and
memory sizes enabling true system-on-a-chip designs. The peripherals
include a 12-bit A/D, slope A/D, multiple timers (some with capture/compare
registers and PWM output capability), on-chip clock generation, H/W
multiplier, USART(s), Watchdog Timer, GPIO, and others.
See http://www.ti.com for the latest device information and literature for the
MSP430 family.
Topic
Page
1.1
Features and Capabilities
1-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
11x Devices
1-3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
11x1 Devices
1-3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4
13x Devices
1-4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5
14x Devices
1-4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1