Texas Instruments MSP430x1xx - Manual (Page 320)

ADC12 Control Registers
15-30
and the time to charge to 1/2 LSB (minimum sampling time) is:
t
ch
(1/2 LSB) = R
t
x C
i
x In(8192)
Where:
In(8192) = 9.011
Therefore, with the values given, the time for the analog input signal to settle
is:
(4)
t
ch
(1/2 LSB) = (R
s
+ 1 k
Ω
)
×
C
i
×
9.011
This time must be less than the sampling time.
If the pulse-sampling mode is used, the maximum ADC12CLK frequency is:
max[f(ADC12CLK)] +
SHTx
t
ch
(1
ń
2LSB)
(5)
This frequency must not exceed the maximum ADC12CLK frequency
specified in the data sheet.
15.8 ADC12 Control Registers
Five control registers, sixteen conversion-memory registers, and sixteen
conversion-memory control registers are used to configure the ADC12:
Register Short Form Register Type Address Initial State
ADC control register 0 ADC12CTL0 Read/write 01A0h Reset with POR
ADC control register 1 ADC12CTL1 Read/write 01A2h Reset with POR
ADC interrupt flag register ADC12IFG Read/write 01A4h Reset with POR
ADC interrupt enable register ADC12IE Read/write 01A6h Reset with POR
ADC interrupt vector word ADC12IV Read 01A8h Reset with POR
ADC memory 0
to
ADC memory 15 ADC12MEM0
ADC12MEM15
Read
0140h
015Eh
Unchanged
ADC memory control 0
to
ADC memory control 15 ADC12MCTL0
ADC12MCTL15
Read
080h
08Fh
Reset with POR
Note: All registers may be accessed by any instruction subject to register-access restrictions.