Texas Instruments MSP430x1xx - Manual (Page 142)

Introduction
10-2
10.1 Introduction
Timer_A is an extremely versatile timer made up of :
- 16-bit counter with 4 operating modes
- Selectable and configurable clock source
- Three or five independently configurable capture/compare registers with
configurable inputs
- Three or five individually configurable output modules with 8 output modes
Timer_A can support multiple, simultaneous, timings; multiple capture/
compares; multiple output waveforms such as PWM signals; and any com-
bination of these. Also, each capture/compare register has hardware support
for implementing serial communications such as UART protocol (see section
10.7).
Additionally, Timer_A has extensive interrupt capabilities. Interrupts may be
generated from the counter on overflow conditions and from each of the cap-
ture/compare registers on captures or compares. Each capture/compare
block is individually configurable and can produce interrupts on compares or
on rising, falling, or both edges of an external capture signal.
The block diagram of Timer_A is shown in Figure 10–1.