Texas Instruments MSP430x1xx - Manual (Page 311)

Conversion Clock and Conversion Speed
15-21
ADC12
Caution! The following must be considered when turning the
ADC12 and voltage reference on or off.
ADC12 turnon time: when the ADC12 is turned on with the
ADC12ON bit, the turnon time noted in the data sheet (t
ADC12ON
)
must be observed before a conversion is started. Otherwise, the
results will be false.
Reference-voltage settling Time: When the built-in reference is
turned on with the VREFON bit, the settling timing noted in the data
sheet must be observed before a conversion is started. Otherwise,
the results will be false until the reference settles. Once all internal
and external references have settled, no additional settling time is
required when selecting or changing the conversion range for each
channel.
Settling time of external signals: external signals must be settled
before performing the first conversion after turning on the ADC12.
Otherwise, the conversion results will be false.
15.6 Conversion Clock and Conversion Speed
The conversion clock for the ADC12 (ADC12CLK shown in Figure 15–13) can
be selected from several sources and can be divided by any factor from 1 –
8. The ADC12CLK is used for the A/D conversion and to generate the
sampling period [if pulse-sampling mode is selected (SHP=1)]. Possible clock
sources are the internal oscillator (ADC12OSC), ACLK, MCLK, and SMCLK.
The internal oscillator generates the ADC12OSC signal and is in the 5-MHz
range (see device data sheet for specifications). The internal-oscillator fre-
quency will vary with individual devices, supply voltage, and temperature. A
stable clock source should be used for the conversion clock when accurate
conversion timing is required.
Figure 15–13. The Conversion Clock ADC12CLK
ACLK
MCLK
SMCLK
ADC12OSC
Internal
Oscillator
ADC12CLK
Divide by
1,2,3,4,5,6,7,8
ADC12DIV ADC12ON
ADC12SSEL
12–bit A/D converter core
to Sample&Hold
VR– VR+