Rainbow Electronics AT91CAP9S250A - Manual (Page 947)

947
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
46.5.7 ADC Timings
Each ADC has its own minimal Startup Time that is programmed through the field STARTUP in
the Mode Register ADC_MR.
In the same way, a minimal Sample and Hold Time is necessary for the ADC to guarantee the
best converted final value between two channels selection. This time has to be programmed
through the bitfield SHTIM in the Mode Register ADC_MR.
Warning: No input buffer amplifier to isolate the source is included in the ADC. This must be
taken into consideration to program a precise value in the SHTIM field. See the section, ADC
Characteristics in the product datasheet.