Rainbow Electronics AT91CAP9S250A - Manual (Page 754)

754
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
40.6.9 PWM Channel Mode Register
Register Name: PWM_CMRx
Access Type: Read/Write
• CPRE: Channel Pre-scaler
• CALG: Channel Alignment
0 = The period is left aligned.
1 = The period is center aligned.
• CPOL: Channel Polarity
0 = The output waveform starts at a low level.
1 = The output waveform starts at a high level.
• CPD: Channel Update Period
0 = Writing to the PWM_CUPDx will modify the duty cycle at the next period start event.
1 = Writing to the PWM_CUPDx will modify the period at the next period start event.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
– – – – – CPD CPOL CALG
7 6 5 4 3 2 1 0
– – – – CPRE
CPRE Channel Pre-scaler
0 0 0 0 MCK
0 0 0 1 MCK/2
0 0 1 0 MCK/4
0 0 1 1 MCK/8
0 1 0 0 MCK/16
0 1 0 1 MCK/32
0 1 1 0 MCK/64
0 1 1 1 MCK/128
1 0 0 0 MCK/256
1 0 0 1 MCK/512
1 0 1 0 MCK/1024
1 0 1 1 CLKA
1 1 0 0 CLKB
Other Reserved