1 bcramc configuration register – Rainbow Electronics AT91CAP9S250A User Manual
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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
24.5.1
BCRAMC Configuration Register
Register Name:
BCRAMC_CR
Access Type:
Read/Write
• CRAM_EN: BCRAMC Enabled
The Reset Value is 0.
This field enables or disables the BCRAMC. As soon as Cellular Ram is enabled, power up sequence can be done. When
cram_en bit is low then BCRAMC is in idle mode and the owait signal is masked. When this bit is disabled during functional
mode, an initialization procedure will be performed to again access the Cellular Ram device.
• LM: Latency Mode
The Reset Value is 3 Cycles.
• DBW: Data Bus Width
0: Data bus width is 32 bits.
1: Data bus width is 16 bits.
• BOUNDARY_WORD: Number of Words in Row
The Reset Value is 64 words (word = 16 or 32 bits) in row.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
VAR_FIX_LAT
23
22
21
20
19
18
17
16
–
–
DS
–
–
–
ADDRDATA_MUX
15
14
13
12
11
10
9
8
–
–
BOUNDARY_WORD
–
–
–
DBW
7
6
5
4
3
2
1
0
–
LM
–
–
–
CRAM_EN
LM
Latency
Cycles
Cellular Ram Version
000
Reserved
Reserved
001
Reserved
Reserved
010
2
1.0/1.5/2.0
011
3
1.0/1.5/2.0
100
4
1.5/2.0
101
5
1.5/2.0
110
6
1.5/2.0
111
Reserved
Reserved