9 udphs endpoint control enable register, Section 44.5.9 ”udphs endpoint con, Trol enable register – Rainbow Electronics AT91CAP9S250A User Manual
Page 889
889
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
44.5.9
UDPHS Endpoint Control Enable Register
Name:
UDPHS_EPTCTLENBx
[x=0..7]
Access Type: Write-only
For additional Information, see
“UDPHS Endpoint Control Register” on page 893
.
• EPT_ENABL: Endpoint Enable
0 = no effect.
1 = enable endpoint according to the device configuration.
• AUTO_VALID: Packet Auto-Valid Enable
0 = no effect.
1 = enable this bit to automatically validate the current packet and switch to the next bank for both IN and OUT transfers.
• INTDIS_DMA: Interrupts Disable DMA
0 = no effect.
1 = If set, when an enabled endpoint-originated interrupt is triggered, the DMA request is disabled.
• NYET_DIS: NYET Disable (Only for High Speed Bulk OUT endpoints)
0 = no effect.
1 = forces an ACK response to the next High Speed Bulk OUT transfer instead of a NYET response.
• DATAX_RX: DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)
0 = no effect.
1 = enable DATAx Interrupt.
• MDATA_RX: MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)
0 = no effect.
1 = enable MDATA Interrupt.
• ERR_OVFLW: Overflow Error Interrupt Enable
0 = no effect.
31
30
29
28
27
26
25
24
SHRT_PCKT
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
BUSY_BANK
–
–
15
14
13
12
11
10
9
8
NAK_OUT
NAK_IN/
ERR_FLUSH
STALL_SNT/
ERR_CRISO/
ERR_NBTRA
RX_SETUP/
ERR_FL_ISO
TX_PK_RDY/
ERR_TRANS
TX_COMPLT
RX_BK_RDY
ERR_OVFLW
7
6
5
4
3
2
1
0
MDATA_RX
DATAX_RX
–
NYET_DIS
INTDIS_DMA
–
AUTO_VALID
EPT_ENABL