Rainbow Electronics AT91CAP9S250A - Manual (Page 24)

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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
8.1.1.1 Internal 32 Kbyte Fast SRAM
The AT91CAP9S500A/AT91CAP9S250A integrates a 32 Kbyte SRAM, mapped at address
0x0010 0000,which is accessible from the AHB bus. This SRAM is single cycle accessible at full
matrix speed.
8.1.1.2 Boot Memory
The AT91CAP9S500A/AT91CAP9S250A Matrix manages a boot memory which depends on
the level on the pin BMS at reset. The internal memory area mapped between address 0x0 and
0x000F FFFF is reserved at this effect.
If BMS is detected at 1, the boot memory is the memory connected on the Chip Select 0 of the
External Bus Interface. The default configuration for the Static Memory Controller, byte select
mode, 16-bit data bus, Read/Write controlled by Chip Select, allows to boot on a 16-bit non-vol-
atile memory.
If BMS is detected at 0, the boot memory is the embedded ROM.
8.1.2 Boot Program
• Downloads and runs an application from external storage media into internal SRAM
• Downloaded code size depends on embedded SRAM size
• Automatic detection of valid application
• Bootloader on a non-volatile memory
– SPI DataFlash ® connected on NPCS0 of the SPI0
• Boot Uploader in case no valid program is detected in external NVM and supporting several
communication media
– Serial communication on a DBGU
– USB Bulk Device Port
– External Memories Mapping
The external memories are accessed through the External Bus Interface. Each Chip Select lines
has a 256 Mbyte memory area assigned.
8.2 External Memories
The external memories are accessed through the External Bus Interfaces. Each Chip Select line
has a 256 Mbyte memory area assigned.
Refer to Figure 8-1 on page 22 .
0x0050 0000 LCD Controller User Interface
0x0060 0000 USB High Speed Device Interface
0x0070 0000 OHCI USB Host User Interface
0x0080 0000 MP Block Slave 1 (hsel[0])
0x0090 0000 MP Block Slave 1 (hsel[1])
0x00A0 0000 MP Block Slave 1 (hsel[2])
0x00B0 0000 MP Block Slave 1 (hsel[3])
Table 8-1. Internal Memory Mapping (Continued)