Rainbow Electronics AT91CAP9S250A - Manual (Page 50)

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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
12.2 Block Diagram
Figure 12-1. ARM926EJ-S Internal Functional Block Diagram
12.3 ARM9EJ-S Processor
12.3.1 ARM9EJ-S Operating States
The ARM9EJ-S processor can operate in three different states, each with a specific instruction
set:
• ARM state: 32-bit, word-aligned ARM instructions.
• Thumb state: 16-bit, halfword-aligned Thumb instructions.
• Jazelle state: variable length, byte-aligned Jazelle instructions.
In Jazelle state, all instruction Fetches are in words.
12.3.2 Switching State
The operating state of the ARM9EJ-S core can be switched between:
• ARM state and Thumb state using the BX and BLX instructions, and loads to the PC
ARM9EJ-S
ICE
Interface
ARM926EJ-S
EmbeddedICE
-RT
Processor
ETM
Interface
Coprocessor
Interface
Droute
Iroute
IEXT
ICACHE
MMU
DCACHE
DEXT
IA
TCM
Interface
Bus
Interface
Unit
AHB
AHB
Data
AHB
Interface
Instruction
AHB
Interface
INSTR
RDATA WDATA
DA