10/100 ethernet mac (emac), 1 description, 2 block diagram – Rainbow Electronics AT91CAP9S250A User Manual
Page 791

791
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
42. 10/100 Ethernet MAC (EMAC)
42.1
Description
The EMAC module implements a 10/100 Ethernet MAC compatible with the IEEE 802.3 stan-
dard using an address checker, statistics and control registers, receive and transmit blocks, and
a DMA interface.
The address checker recognizes four specific 48-bit addresses and contains a 64-bit hash regis-
ter for matching multicast and unicast addresses. It can recognize the broadcast address of all
ones, copy all frames, and act on an external address match signal.
The statistics register block contains registers for counting various types of event associated
with transmit and receive operations. These registers, along with the status words stored in the
receive buffer list, enable software to generate network management statistics compatible with
IEEE 802.3.
42.2
Block Diagram
Figure 42-1. EMAC Block Diagram
APB
Slave
Register Interface
DMA Interface
Address Checker
Statistics Registers
Control Registers
Ethernet Receive
Ethernet Transmit
MDIO
MII/RMII
RX FIFO
TX FIFO
AHB
Master