Avago Technologies LSI53C1000R - Manual (Page 85)

SCSI Functional Description 2-55
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
2.2.18 Chained Block Moves
Because the LSI53C1000R has the capability to transfer 16-bit wide
SCSI data, a unique situation occurs when dealing with odd bytes. The
Chained Move (CHMOV) SCRIPTS instruction along with
the Wide SCSI Send (WSS) and Wide SCSI Receive (WSR) bits in the
SCSI Control Two (SCNTL2) register facilitate these situations. The
Chained Block Move instruction is illustrated in
Figure 2.7 .
Figure 2.7 Block Move and Chained Block Move Instructions
CHMOV 5, 3 when Data-Out
Moves five bytes from address 0x03 in the host memory to the SCSI bus.
Bytes 0x03, 0x04, 0x05, and 0x06 are moved, and byte 0x07 remains in
the SCSI core (in the lower byte of the SODL register for asynchronous
transfers, in the chain byte holding register for synchronous transfers).
The stored byte is combined with the first byte of the following CHMOV
instruction.
CHMOV 0x5, 0x9 when Data-In
Moves five bytes from address 0x09 in the host memory to the SCSI bus.
The data in address 0x09 is married with the stored data (0x07) and
transferred to the SCSI bus.
0x03 0x02 0x01 0x00
0x07 0x06 0x05 0x04
0x0B 0x0A 0x09 0x08
0x0F 0x0E 0x0D 0x0C
0x13 0x12 0x11 0x10
0x04 0x03
0x06 0x05
0x09 0x07
0x0B 0x0A
0x0D 0x0C
32 Bits 16 Bits
Host Memory SCSI Bus
0x00
0x04
0x08
0x0C
0x10