Avago Technologies LSI53C1000R - Manual (Page 369)

LSI53C1000R PCI to Ultra160 SCSI Controller Technical Manual B-1
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Appendix B
External Memory Interface
Diagram Examples
Appendix B has example external memory interface diagrams.
Figure B.1 16 Kbyte Interface with 200 ns Memory
LSI53C1000R 27C128
MOE/
OE
MCE/
CE
D[7:0]
MAD[7:0]
Bus
CK
Q[7:0]
A[7:0]
QE
D[5:0]
CK
Q[5:0]
QE
A[13:8]
6
V
DD
MAS0/
MAS1/
8
Note: MAD[3:1] pulled LOW internally. MAD bus sense logic enabled for 16 Kbytes of slow memory
(200 ns devices @ 66 MHz).
HCT374
HCT374
D[7:0]
MAD0 4.7 K
8
6