Avago Technologies LSI53C1000R User Manual
Page 184
4-72
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
SBMC
SCSI Bus Mode Change
4
Setting this bit allows the LSI53C1000R to generate an
interrupt when the DIFFSENS pin detects a change in
voltage level that indicates the SCSI bus has changed
between SE, LVD, or HVD modes. For example, when
this bit is cleared and the SCSI bus changes modes, INT/
does not assert and the SIP bit in the
Interrupt Status Zero (ISTAT0)
register is not set.
However, bit 4 in the
SCSI Interrupt Status One (SIST1)
register is set. Setting this bit allows the interrupt to
occur.
R
Reserved
3
STO
Selection or Reselection Time-out
2
This bit is set when the SCSI device which the
LSI53C1000R is attempting to select or reselect does not
respond within the programmed time-out period. Refer to
the description of the
register,
bits [3:0], for more information on the time-out timer.
GEN
General Purpose Timer Expired
1
This bit is set when the general purpose timer expires.
The time measured is the time between enabling and
disabling of the timer. Refer to the description of the
register, bits [3:0], for more
information on the general purpose timer.
HTH
Handshake-to-Handshake Timer Expired
0
This bit is set when the handshake-to-handshake timer
expires. The time measured is the SCSI
Request-to-Request (target) or
Acknowledge-to-Acknowledge (initiator) period. Refer to
the description of the
register,
bits [7:4], for more information on the
handshake-to-handshake timer.