Avago Technologies LSI53C1000R - Manual (Page 19)

LSI53C1000R PCI to Ultra160 SCSI Controller Technical Manual 1-1
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Chapter 1
Introduction
This chapter provides a general overview on the LSI53C1000R PCI to
Ultra160 SCSI Controller. This chapter contains the following sections:
•
Section 1.1, “General Description”
•
Section 1.2, “Benefits of Ultra160 SCSI”
•
Section 1.3, “Benefits of SURElink (Ultra160 SCSI Domain Validation)
Technology”
•
Section 1.4, “Benefits of LVDlink Technology”
•
Section 1.5, “Benefits of TolerANT® Technology”
•
Section 1.6, “Summary of LSI53C1000R Benefits”
1.1 General Description
The LSI53C1000R brings Ultra160 SCSI performance to host adapter,
workstation, and server designs, making it easy to add a
high-performance SCSI bus to any PCI system.
The LSI53C1000R supports a 64-bit or 32-bit, 66 or 33 MHz PCI bus.
The Ultra160 SCSI features implemented in the LSI53C1000R are:
double transition (DT) clocking, cyclic redundancy check (CRC), and
domain validation. These features comply with the Ultra160 SCSI
industry initiative.
DT clocking permits the LSI53C1000R to transfer data up to
160 Mbytes/s. CRC improves the integrity of the SCSI data transmission
through enhanced detection of communication errors. Asynchronous
Information Protection (AIP) augments CRC to protect all nondata
phases, providing complete end-to-end protection of the SCSI I/O.
SURElink™ domain validation technology detects the SCSI bus