Avago Technologies LSI53C1000R - Manual (Page 241)

SCSI Shadow Registers 4-129
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0xA8–0xAB
Shadowed SCRIPT Fetch Selector (SFS)
Read/Write
SFS Shadowed SCRIPT Fetch Selector [31:0]
When the PCI Configuration Info Enable bit in the
Chip Test Two (CTEST2) register is set, the
SCRIPT Fetch Selector register is placed in shadow
mode. In this mode, bits [23:16] of this register return the
PCI
Revision ID (RID) register value and bits [15:0] return
the PCI Device ID register value when read. Writes to the
SCRIPT Fetch Selector (SFS) register have no effect.
Clearing the PCI Configuration Info Enable bit causes the
SFS register to return to normal operation.
31 0
SFS
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0