beautypg.com

Avago Technologies LSI53C1000R User Manual

Page 105

background image

SCSI Bus Interface Signals

3-11

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

SDP[1:0]+

W1, P5

I/O

SE:

48 mA

SCSI

LVD:

12 mA

UniLVD

SCSI Parity.

LVD Mode: Positive half of LVDlink pair for
the SCSI parity lines. SDP[1:0]+ are the
SCSI data parity lines.

SE Mode: SDP[1:0]+ are at 0 V.

DIFFSENS

E2

I

N/A

SCSI Differential Sense pin detects the
present mode of the SCSI bus when
connected to the DIFFSENS signal on the
physical SCSI bus.

LVD Mode: If a voltage between 0.7 V and
1.9 V is present, the SCSI bus operates in
the LVD mode.

SE Mode: When this pin is driven LOW
(below 0.5 V), the SCSI bus operates in
the SE mode.

HVD Mode: When this pin is detected
HIGH (above 2.0 V) HVD operation is
indicated. The SCSI bus is driven to the
high impedance state. This pin is 5 V
tolerant. The HVD Mode is not supported.

Table 3.9

SCSI Signals (Cont.)

Name

Bump

Type

Strength

Description

This manual is related to the following products: