Avago Technologies LSI53C1000R - Manual (Page 34)

2-4 Functional Description
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
2.1.1.2 I/O Space
The PCI specification defines I/O space as a contiguous 32-bit I/O
address that is shared by all system resources, including the
LSI53C1000R.
Base Address Register Zero (BAR0) (I/O) determines
which 256-byte I/O area this device occupies.
2.1.1.3 Memory Space
The PCI specification defines memory space as a contiguous 64-bit
memory address that is shared by all system resources.
Base Address Register One (BAR1) (MEMORY) determines which
1 Kbyte memory area this device occupies. The SCSI function uses an
8 Kbyte SCRIPTS RAM memory space.
Base Address Register Two (BAR2) (MEMORY) determines the 8 Kbyte
memory area the SCRIPTS RAM occupies.
2.1.2 PCI Bus Commands and Functions Supported
Bus commands indicate to the target the type of transaction the master
is requesting. Bus commands are encoded on the C_BE[3:0]/ lines
during the address phase. PCI bus commands and encoding types
appear in
Table 2.1 .