Figure6.31 slow memory (³ 128 kbytes) read cycle, Slow memory, Slow memory ( 128 kbytes) read cycle – Avago Technologies LSI53C1000R User Manual
Page 339
PCI and External Memory Interface Timing Diagrams
6-57
Version 2.2
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Figure 6.31 Slow Memory (
≥
128 Kbytes) Read Cycle
Figure 6.31 Slow Memory (
≥
128 Kbytes) Read Cycle (Cont.)
CLK
(Driven by System)
1
2
3
4
5
6
7
8
9
10
MAD
(Addr drvn by LSI53C1000R
High Order
Address
Middle Order
Address
Low Order
Address
MAS1/
(Driven by LSI53C1000R)
MAS0/
(Driven by LSI53C1000R)
MCE/
(Driven by LSI53C1000R)
MOE/
(Driven by LSI53C1000R)
MWE/
(Driven by LSI53C1000R)
t
13
t
11
t
12
t
15
t
16
Data drvn by Mem)
t
14
CLK
(Driven by System)
Data Driven by Memory)
11
12
13
14
15
16
17
18
19
20
MAD
(Addr driven by LSI53C1000R;
MAS1/
(Driven by LSI53C1000R)
MAS0/
(Driven by LSI53C1000R)
MCE/
(Driven by LSI53C1000R)
MOE/
(Driven by LSI53C1000R)
MWE/
(Driven by LSI53C1000R)
t
15
21
Read
Data
t
19
t
17
t
14
t
16
Valid
t
18
22