Avago Technologies LSI53C1000R - Manual (Page 84)

2-54 Functional Description
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Figure 2.6 Interrupt Routing Hardware Using the LSI53C1000R
There can only be one entity controlling a mainboard SCSI core or
conflicts occur. Typically, a SCSI core is controlled by the SCSI BIOS and
an operating system driver. When a SCSI core is allocated to a RAID
adapter, however, a mechanism must be implemented to prevent the SCSI
BIOS and operating system driver from trying to access the SCSI core.
The mainboard designer has several options to choose from for doing this.
•
The first option is to have the SCSI core load its PCI Subsystem ID
using a serial EPROM on power-up. If bit 15 in this ID is set, the
LSI Logic BIOS and operating system drivers ignore the chip. This
makes it possible to control the assignment of the mainboard SCSI
cores using a configuration utility.
•
The second option is to provide mainboard and system BIOS
support for Nonvolatile Storage (NVS). The SCSI core may then be
enabled or disabled using the SCSI BIOS configuration utility. Not all
versions of the LSI Logic drivers support this capability.
•
The third option is to have the system BIOS not report the existence
of the SCSI controller chips when the SCSI BIOS and operating
systems make PCI BIOS calls. This approach requires modifications
to the system BIOS and assumes the operating system uses
PCI BIOS calls when searching for PCI devices.
A4
A6
A7
SCSI Core
LSI53C1000R
ALT_INTA/
2.7 K
+ 5 V
INTA/
INTA/
INTC/
TDI
+ 5 V
INT_DIR
PCI RAID
Upgrade
Slot INTA/
MB SCSI INTA/
These interrupt lines are
connected to the other PCI
slot interrupt lines as
determined by the
mainboard interrupt
routing scheme.
10 K PCI RAID Upgrade Slot