Register: 0x08 – Avago Technologies LSI53C1000R User Manual

Page 148

4-36

Registers

Version 2.2

Register: 0x08

SCSI First Byte Received (SFBR)
Read/Write

SFBR

SCSI First Byte Received

[7:0]

This register contains the first byte received in any
asynchronous information transfer phase. For example,
when an LSI53C1000R is operating in the initiator mode,
this register contains the first byte received in the
Message-In, Status, and Data-In phases.

When a Block Move instruction is executed for a particular
phase, the first byte received is stored in this register,
even if the present phase is the same as the last phase.
The first byte received value for a particular input phase
is not valid until after a MOVE instruction is executed.

This register is also the accumulator for register
read-modify-writes with the

SCSI First Byte Received (SFBR)

as the destination. This

allows bit testing after an operation.

The

SCSI First Byte Received (SFBR)

is not writable

using the CPU, and therefore not by a Memory Move.
However, it can be loaded using SCRIPTS Read/Write
operations. To load the SFBR with a byte stored in
system memory, the byte must first be moved to an
intermediate LSI53C1000R register (such as the
SCRATCH register), and then to the SFBR.

This register also contains the state of the lower eight bits
of the SCSI data bus during the Selection phase if the
COM bit in the

DMA Control (DCNTL)

If the COM bit is cleared, do not access this register using
SCRIPTS operations, because indeterminate operations
may occur. (This includes SCRIPTS Read/Write
operations and conditional transfer control instructions that
initialize the

SCSI First Byte Received (SFBR)

SFBR

This manual is related to the following products:

LSI53C1000