Table 2.1 pci bus commands and encoding types, Pci bus commands and encoding types, Table 2.1 – Avago Technologies LSI53C1000R User Manual
Page 35
PCI Functional Description
2-5
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
2.1.2.1 Interrupt Acknowledge Command
The LSI53C1000R does not respond to this command as a slave and it
never generates this command as a master.
2.1.2.2 Special Cycle Command
The LSI53C1000R does not respond to this command as a slave and it
never generates this command as a master.
Table 2.1
PCI Bus Commands and Encoding Types
C_BE[3:0]/
Command Type
Supported
as Master
Supported
as Slave
0000
Interrupt Acknowledge
No
No
0001
Special Cycle
No
No
0010
I/O Read
Yes
Yes
0011
I/O Write
Yes
Yes
0100
Reserved
N/A
N/A
0101
Reserved
N/A
N/A
0110
Memory Read
Yes
Yes
0111
Memory Write
Yes
Yes
1000
Reserved
N/A
N/A
1001
Reserved
N/A
N/A
1010
Configuration Read
No
Yes
1011
Configuration Write
No
Yes
1100
Memory Read Multiple
Yes
1
1. Refer to the
register.
Yes (defaults to 0110)
1101
Dual Address Cycle (DAC)
Yes
Yes
1110
Memory Read Line
Yes
1
Yes (defaults to 0110)
1111
Memory Write and
Invalidate
Yes
2
2. Refer to the
register.
Yes (defaults to 0111)