Scsi status one (sstat1), Register: 0x0e – Avago Technologies LSI53C1000R User Manual
Page 155
SCSI Registers
4-43
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
WOA
Won Arbitration
2
When set, WOA indicates that the LSI53C1000R has
detected a Bus Free condition, arbitrated for the SCSI
bus, and won arbitration. The arbitration mode selected
in the
register must be full
arbitration and selection to set this bit.
RST
SCSI RST/Signal
1
This bit reports the current status of the SCSI
RST/ signal, and the RST signal (bit 3) in the
register. This bit is not
latched and may change as it is read.
SDP0
SCSI SDP0 Parity Signal
0
This bit represents the present state of the SCSI SDP0/
parity signal. This signal is not latched and may change
as it is read.
Register: 0x0E
SCSI Status One (SSTAT1)
Read Only
R
Reserved
[7:4]
SDP0L
Latched SCSI Parity
3
This bit reflects the SCSI parity signal (SDP0/) that
corresponds to the data latched in the
. It changes when a new
byte is latched into the least significant byte of the SIDL
register. This bit is active HIGH, in other words, it is set
when the parity signal is active.
MSG
SCSI MSG/ Signal
2
This SCSI phase status bit is latched on the asserting
edge of SREQ/ when operating in either the initiator or
target mode. This bit is set when the corresponding
signal is active. This bit is useful when operating in the
low-level mode.
7
4
3
2
1
0
R
SDP0L
MSG
C_D
I_O
0
0
0
0
x
x
x
x