Response id zero (respid0), Register: 0x4a – Avago Technologies LSI53C1000R User Manual
Page 194
4-82
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
HTHSF
Handshake to Handshake Timer Scale Factor
4
Setting this bit causes this timer to shift by a factor of 16.
Refer to the
register
description for details.
GEN[3:0]
General Purpose Timer Period
[3:0]
These bits select the period of the general purpose timer.
The time measured is the time between enabling and
disabling of the timer. When this timing is exceeded, the
GEN bit in the
SCSI Interrupt Status One (SIST1)
register
is set. Refer to the table under
,
bits [3:0], for the available time-out periods.
Note:
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another.
Register: 0x4A
Response ID Zero (RESPID0)
Read/Write
RESPID0
Response ID Zero
[7:0]
RESPID0 and
contain the
selection or reselection IDs. These two 8-bit registers
contain the SCSI ID that the chip responds to on the
SCSI bus. Each bit represents one possible ID; the most
significant bit of
represents
ID 15, and the least significant bit of RESPID0 represents
ID 0. The
register still contains the
chip ID used during arbitration. The chip can respond to
more than one ID because more than one bit can be set
in the RESPID1 and RESPID0 registers. However, the
chip can arbitrate with only one ID value in the
register.
7
0
RESPID0
x
x
x
x
x
x
x
x