9 mad bus programming, Mad bus programming, Section 3.9, “mad bus programming – Avago Technologies LSI53C1000R User Manual
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MAD Bus Programming
3-17
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
3.9 MAD Bus Programming
The MAD[7:0] pins, in addition to serving as the address/data bus for the
local memory interface, also program power-up options for the chip. A
particular option is programmed allowing the internal pull-down current
sink to pull the pin LOW at reset or by connecting a 4.7 k
Ω
resistor
B_RBIAS
A11
I
N/A
Connects an external resistor
to generate the bias current
used by LVDlink pads. Resistor
value should be 10.0 k
Ω
.
Connect the other end of the
resistor to V
DD
.
NC
A3, A4, A7, A8, A12, A15, A16,
A19, A20, A23, A24, B2, B3,
B5, B6, B7, B8, B9, B10, B11,
B12, B14, B15, B16, B17, B18,
B19, B20, B21, B22, B23, B24,
B25, C2, C3, C5, C6, C9, C10,
C13, C14, C17, C18, C22,
C24, C25, D4, D5, D8, D9,
D10, D11, D12, D13, D14,
D15, D16, D17, D18, D19,
D20, D21, D22, D23, E3, E4,
E5, E6, E8, E9, E10, E11, E12,
E13, E14, E15, E16, E17, E18,
E20, E21, E22, E23, E24, F4,
F5, F22, G5, K23, K25, L23,
L25, M23, M25, N2, N23, P2,
R1, W25, Y5, Y22, AA4, AA5,
AA22, AB3, AB4, AB5, AB9,
AB21, AB22, AC4, AC10,
AC22, AC23, AD2, AD3, AD9,
AD14, AD18, AD24, AE5, AE6,
AE7, AE25, AF4, AF12, AF15
N/A
N/A
These pins are reserved or
have no internal connection.
1. The I/O driver pad rows and digital core have isolated power supplies as indicated by the “I/O” and
“CORE” extensions on their respective V
SS
and V
DD
names. Connect the power and ground pins
directly to the primary power and ground planes of the circuit board. Apply bypass capacitors of
0.01
µ
F between adjacent VSS and VDD pairs wherever possible. Do not connect bypass capacitors
between VSS and VDD pairs that cross power and ground bus boundaries.
2. To reduce signal noise that can affect Frequency Synthesizer (FSN) functionality, place a ferrite bead
in series with the VDDA and VSSA pins. The recommended rating of the bead is 150
Ω
at 100 MHz.
Table 3.14
Power and Ground Signals (Cont.)
Name
1
Bump
Type
Strength
Description