Avago Technologies LSI53C1000R - Manual (Page 228)

4-116 Registers
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0xC8–0xCB
Remaining Byte Count (RBC)
Read/Write
RBC Remaining Byte Count [31:0]
This register contains the byte count that remains for the
BMOV that was executing when the phase mismatch
occurred. In the case of Direct or Indirect BMOV
instructions, the upper byte of this register also contains the
opcode of the BMOV that was executing. In the case of a
Table Indirect BMOV instruction, the upper byte contains
the upper byte of the Table Indirect entry that was fetched.
In the case of a SCSI data receive, this byte count reflects
all data received from the SCSI bus, including any byte in
SCSI Wide Residue (SWIDE) . There is no data remaining
in the part that must be flushed to memory with the
exception of a possible byte in the SWIDE register. That
byte must be flushed to memory manually in SCRIPTS.
In the case of a SCSI data send, this byte count reflects
all data sent out onto the SCSI bus. Any data left in the
part from the phase mismatch is ignored and
automatically cleared from the FIFOs.
31 0
RBC
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0