Avago Technologies LSI53C1000R - Manual (Page 112)

3-18 Signal Descriptions
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
between the appropriate MAD[x] pin and V
DD
. The pull-down resistors
require that HC or HCT external components are used for the memory
interface. A description of the MAD bus pins follows:
•
MAD[7], Serial EEPROM programmable option – When pulled LOW
by the internal pull-down current sink, the automatic data download is
enabled. When pulled HIGH by an external resistor, the automatic data
download is disabled. Refer to
Section 2.4, “Serial EEPROM Interface,”
and the PCI Configuration Registers and Subsystem Vendor ID (SVID)
register descriptions.
•
MAD[6] – Reserved.
•
MAD[5] – Reserved.
•
MAD[4] – Reserved.
•
MAD[3:1] – These pins set the size of the external expansion ROM
device attached.
Table 3.15 provides the encoding for these pins. A
“0” indicates a pull-down resistor is attached while a “1” indicates a
pull-up resistor is attached.
•
MAD[0], slow ROM – When pulled up, this pin enables use of slower
memory devices by including two extra data access cycles.
Note: All MAD pins have internal pull-down resistors.
Table 3.15 MAD[3:1] Pin Decoding
MAD[3:1] Available Memory Space
000 16 Kbytes
001 32 Kbytes
010 64 Kbytes
011 128 Kbytes
100 256 Kbytes
101 512 Kbytes
110 1024 Kbytes
111 No external memory present