beautypg.com

Rockwell Automation 1747-PT1, D1747NP002 Hand-Held Terminal User Manual

Page 481

background image

Hand–Held Terminal

Index

User Manual

I–7

instruction status bits, 18–7
mnemonic listing, 2–14

modifying branches, 7–19

appending a branch, 7–24
extending a branch down, 7–22
extending a branch up, 7–19

modifying instructions, 7–16

changing the address of an instruction,

7–16

changing the instruction type, 7–18

modifying rungs, 7–14

adding an instruction to a rung, 7–14

monitoring

application, 12–1
data files, 12–3
program files, 12–1

move (MOV)

mnemonic listing, 2–14
move and logical instructions, 15–6, 21–2

move and logical instructions, 15–6, 21–1

and (AND), 15–6, 21–5
exclusive or (XOR), 15–6, 21–7
masked move (MVM), 15–6, 21–3
move (MOV), 15–6, 21–2
not (NOT), 15–6, 21–8
or (OR), 15–6, 21–6

multiply (MUL)

math instruction, 15–5, 20–7
mnemonic listing, 2–14

N

naming the ladder program, 6–8

naming your program file, 6–9

negate (NEG)

math instruction, 15–5, 20–10
mnemonic listing, 2–15

nested branching, 5–6

node configuration, 9–8

changing the baud rate, 9–10
consequences of changing a processor

node address, 9–9

entering a maximum node address, 9–10

not (NOT)

mnemonic listing, 2–15
move and logical instructions, 15–6, 21–8

not equal (NEQ)

comparison instruction, 15–4, 19–3
mnemonic listing, 2–15

number systems, B–1

BCD, B–3
binary, B–1
hex mask, B–5
hexadecimal, B–4

O

one–shot rising (OSR)

bit instruction, 15–1, 16–7
mnemonic listing, 2–15

operating cycle, 5–11

or (OR)

mnemonic listing, 2–15
move and logical instructions, 15–6, 21–6

OSR, one–shot rising, bit instruction, 16–7

OTE, output energize, bit instruction, 16–4

OTL, output latch, bit instruction, 16–5

OTU, output unlatch, bit instruction, 16–5

output branching, 5–5

output data file display, 12–5

output energize (OTE)

bit instruction, 5–1, 15–1, 16–4
mnemonic listing, 2–15

output latch (OTL)

bit instruction, 15–1, 16–5
mnemonic listing, 2–15

output unlatch (OTU)

bit instruction, 15–1, 16–5
mnemonic listing, 2–15

P

parallel logic, 5–4

input branching, 5–5
nested branching, 5–6
output branching, 5–5

password, 6–10

entering, 6–11
master password, 6–10
removing and changing, 6–13

PID instruction, 15–9, 26–1

5/02 processor, 26–1
analog I/O scaling, 26–12
application notes, 26–16
control block layout, 26–8
entering parameters, 26–4
equation, 26–4