Rockwell Automation 1747-PT1, D1747NP002 Hand-Held Terminal - Manual (Page 459)

Instruction Execution Times
Appendix C
Memory Usage,
C–5
Instruction Execution Times for the Fixed and SLC 5/01 Processors
➀
Execution Time
in Microseconds
(approx.)
False True
Instruction
ADD 12 122
AND 12 87
BSL 12 144 + 24 per word
BSR 12 134 + 24 per word
CLR 12 40
COP 12 45 + 21 per word
CTD 12 111
CTU 12 111
DCD 12 80
DDV 12 650
DIV 12 400
EQU
➀
12 60
FLL 12 37 +14 per word
FRD 12 223
GEQ
➀
12 60
GRT
➀
12 60
HSC 12 60
IIM 12 372
IOM 12 475
JMP 12 38
JSR 12 46
LBL 2 2
LEQ
➀
12 60
LES
➀
12 60
Execution Time
in Microseconds
(approx.)
False True
Instruction
MCR 10 10
MEQ
➀
12 75
MOV 12 20
MUL 12 230
MVM 12 115
NEG 12 110
NEQ
➀
12 60
NOT 12 66
OR 12 87
OSR 12 34
OTE 18 18
OTL 19 19
OTU 19 19
RES 12 40
RET 12 34
RTO 12 140
SBR 2 2
SQC 12 225
SQO 12 225
SUB 12 125
SUS 12 12
TND 12 32
TOD 12 200
TOF 12 140
TON 12 135
XIC
➀
4 4
XIO
➀
4 4
XOR 12 87
For the rung example at the right:
1) If instruction 1 is false, instructions 2, 3,
4, 5, 6, 7 take zero execution time.
Execution time =
4 + 18 = 22 microseconds.
2) If instruction 1 is true, 2 is true, and 6 is
true, then instructions 3, 4, 5, 7 take
zero execution time. Execution time =
4 + 4 + 4 + 18 = 30 microseconds.
] [
1
( )
8
] [
2
] [
6
] [
3
] [
4
] [
5
] [
7
These instructions take zero execution time if
they are preceded by conditions that guarantee
the state of the rung. Rung logic is solved left
to right. Branches are solved top to bottom.