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Rockwell Automation 1747-PT1, D1747NP002 Hand-Held Terminal User Manual

Page 462

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Instruction Execution Times

Appendix C
Memory Usage,

C–8

Instruction Execution Times for the SLC 5/02 Processor Series A or B

Instruction

(Series A or B

SLC 5/02)

MSG

80

300

MUL

12

234

MVM

12

119

NEG

12

114

NEQ

12

64

NOT

12

70

OR

12

91

OSR

12

34

OTE

18

18

OTL

19

19

OTU

19

19

PID

150

6000

REF

6

400 +
300 per word

RES

12

44

RET

12

34

RPI

12

400

RTO

12

144

SBR

2

6

SCL

12

800

SQC

12

229

SQL

60

225

SQO

12

229

SQR

12

270

STD

6

15

STE

6

15

STS

12

120

SUB

12

129

SUS

12

12

SVC

6

400

TND

12

36

TOD

12

204

TOF

12

144

TON

12

139

XIC

4

4

XIO

4

4

XOR

12

91

For the rung example below:
1) If instruction 1 is false, instructions 2, 3, 4, 5, 6, 7

take zero execution time.
Execution time = 4 + 18 = 22 microseconds.

2) If instruction 1 is true, 2 is true, and 6 is true, then

instructions 3, 4, 5, 7 take zero execution time.
Execution time = 4 + 4 + 4 + 18 = 30
microseconds.

Execution Time

in Microseconds

(approx.)

False

True

ADD

12

126

AND

12

91

BSL

12

148 + 24 per word

BSR

12

138 + 24 per word

CLR

12

44

COP

12

49 + 21 per word

CTD

12

115

CTU

12

115

DCD

12

84

DDV

12

654

DIV

12

404

EQU

12

64

FFL

85

250

FFU

85

250 +
18 x position value

FLL

12

41 + 14 per word

FRD

12

227

GEQ

12

64

GRT

12

64

IID

12

65

IIE

12

70

IIM

12

552

INT

0

0

IOM

12

767

JMP

12

38

JSR

12

46

LBL

2

6

LEQ

12

64

LES

12

64

LFL

85

250

LFU

85

300

LIM

12

75

MCR

10

10

MEQ

12

79

MOV

12

24

Execution Time

in microseconds

(approx.)

False

True

Instruction

(Series A or B

SLC 5/02)

This only includes the amount of time needed
to “set up” the operation requested. It does not
include the time it takes to service the actual
communications.

] [

1

( )

8

] [

2

] [

6

] [

3

] [

4

] [

5

] [

7

These instructions take zero execution time if
they are preceded by conditions that guarantee
the state of the rung. Rung logic is solved left
to right. Branches are solved top to bottom.