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Multiply (mul), Using arithmetic status bits, Math register – Rockwell Automation 1747-PT1, D1747NP002 Hand-Held Terminal User Manual

Page 283

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Chapter 20
Math Instructions

20–7

Multiply

MUL

Output Instruction

(MUL)

MUL

MULTIPLY
Source A

N7:0

8

Source B

N7:1
2150

Dest

N7:2

17200

F1

F2

F3

F4

F5

ZOOM on MUL –(MUL)– 2.3.0.0.2
NAME: MULTIPLY
SOURCE A: N7:0 8
SOURCE B: N7:1 2150
DEST: N7:2 17200

EDT_DAT

HHT Ladder Display:

HHT Zoom Display:

Ladder Diagrams and APS Displays:

(online monitor mode)

The value at source A is multiplied by the value at source B and then stored
in the destination.

Using Arithmetic Status Bits

C always reset

V set if overflow is detected at the destination; otherwise reset. On

overflow, the minor error flag is also set. The value 32,767 or –32,768 is
placed in the destination. Exception: If you are using a Series C or later
SLC 5/02 processor and have the Math Overflow Selection Bit S:2/14 set,
then the unsigned, truncated overflow remains in the destination.

Z set if the result is zero; otherwise reset

S set if the result is negative; otherwise reset

Math Register

Contains the 32–bit signed integer result of the multiply operation. This
result is valid at overflow.

Multiply (MUL)