Power management capabilities, Next item pointer, Capability id – Avago Technologies LSI8751D User Manual
Page 89: 0x40, Register: 0x40, Register: 0x41, Register: 0x42
Configuration Registers
3-25
Register: 0x40
Capability ID
Read Only
CID
Cap_ID
[7:0]
This register indicates the type of data structure currently
being used. It is set to 0x01, indicating the Power
Management Data Structure. Only the LSI53C875E sets
this register to 0x01.
Register: 0x41
Next Item Pointer
Read Only
NIP
Next_Item_Ptr
[7:0]
Bits [7:0] contain the offset location of the next item in the
controller capabilities list. The default value for this
register is 0x00, indicating that power management is the
last capability in the linked list of extended capabilities.
This register applies to the LSI53C875E only.
Register: 0x42
Power Management Capabilities
Read Only
This register applies to the LSI53C875E only and indicates the power
management capabilities.
7
0
CID
0
0
0
0
0
0
0
1
7
0
NIP
0
0
0
0
0
0
0
0
15
11
10
9
8
6
5
4
3
2
0
PMES[4:0]
D2S D1S
R
DSI APS PMEC
VER[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1