Avago Technologies LSI8751D - Manual (Page 307)

Index IX-3
M
MACNTL register 5-62
MAD bus programming 4-22
MAD[0] 4-24
MAD[3:1] 4-24
MAD[4] 4-23
MAD[5] 4-23
MAD[6] 4-23
MAD[7] 4-22
manual start mode bit 5-49
master control for set or reset pulses bit 5-42
master data parity error bit 5-24
,
5-50
master enable bit 5-63
master parity error enable bit 5-41
max SCSI synchronous offset bits 5-17
memory access control register 5-62
memory move instructions 6-33
and SCRIPTS instruction prefetching 2-5
no flush option 2-5
memory read line command 3-8
memory read multiple command 3-9
memory write and invalidate command 3-6
write and invalidate mode bit 3-14
MG[7:0] 3-24
min_gnt (MG[7:0]) 3-24
N
no flush memory move instruction 6-34
O
opcode fetch bursting 2-6
operating registers
adder sum output 5-53
chip test five 5-42
chip test four 5-40
chip test one 5-35
chip test six 5-43
chip test three 5-37
chip test two 5-35
chip test zero 5-34
data structure address 5-31
DMA byte counter 5-44
DMA command 5-45
DMA control 5-51
DMA FIFO 5-39
DMA interrupt enable 5-50
DMA mode 5-47
DMA next address 5-45
DMA SCRIPTS pointer 5-46
DMA SCRIPTS pointer save 5-46
DMA status 5-23
general information 5-1
general purpose 5-19
general purpose pin control 5-63
interrupt status 5-31
memory access control 5-62
response ID one 5-70
response ID zero 5-69
scratch byte 5-51
scratch register A 5-47
scratch register B 5-79
SCSI bus control Lines 5-22
SCSI bus data lines 5-78
SCSI chip ID 5-14
SCSI control one register 5-6
SCSI control register two 5-9
SCSI control three 5-12
SCSI control zero 5-3
SCSI destination ID 5-18
SCSI first byte received 5-20
SCSI input data latch 5-77
SCSI interrupt enable one 5-55
SCSI interrupt enable zero 5-53
SCSI interrupt status one 5-59
SCSI interrupt status zero 5-56
SCSI longitudinal parity 5-60
SCSI output control latch 5-21
SCSI output data latch 5-78
SCSI selector ID 5-22
SCSI status one 5-27
SCSI status two 5-29
SCSI status zero 5-26
SCSI test one 5-72
SCSI test three 5-75
SCSI test two 5-73
SCSI test zero 5-70
SCSI timer one 5-66
SCSI timer zero 5-64
SCSI transfer 5-15
SCSI wide residue 5-61
temporary stack 5-38
P
package and feature options 1-4
parity 2-12
parity error bit 5-58
PCI cache mode 3-4
cache line size enable bit 5-51
cache line size register 3-18
enable read multiple bit 5-49
memory read line command 3-8
memory read multiple command 3-9
memory write and invalidate command 3-6
write and invalidate mode bit 3-14
write and invalidate enable bit 5-38
PCI commands 3-2
PCI configuration registers 3-11
to
3-24
base address one (memory) 3-19
base address zero (I/O) 3-19
cache line size 3-18
class code 3-17
command 3-13
data 3-28
device ID 3-13
expansion ROM base address 3-21
header type 3-19
interrupt line 3-23
interrupt pin 3-23
latency timer 3-18
max_lat 3-24
min_gnt 3-24
next item pointer 3-25
power management control/status 3-26
revision ID 3-17
status 3-15
subsystem data 3-20
subsystem ID (SSID) 3-21