Response, Id zero (respid0), Response id – Avago Technologies LSI8751D User Manual
Page 185: Zero (respid0), Response id zero (respid0), Register: 0x4a (0xca)
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GEN bit in the
SCSI Interrupt Status One (SIST1)
register
is set. Refer to the table under
, bits [3:0], for the available time-out periods.
Note:
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another. See
Chapter 2, “Functional Description,”
for an explanation of
how interrupts are generated when the timers expire.
Register: 0x4A (0xCA)
Response ID Zero (RESPID0)
Read/Write
RESPID0
Response ID Zero
[7:0]
RESPID0 and RESPID1 contain the selection or
reselection IDs. In other words, these two 8-bit registers
contain the ID that the chip responds to on the SCSI bus.
Each bit represents one possible ID with the most
significant bit of RESPID1 representing ID 15 and the
least significant bit of RESPID0 representing ID 0. The
register still contains the chip ID
used during arbitration. The chip can respond to more
than one ID because more than one bit can be set in the
and
registers. However, the chip can arbitrate with
only one ID value in the
register.
7
0
ID
x
x
x
x
x
x
x
x