Avago Technologies LSI8751D User Manual
Page 225
Transfer Control Instructions
6-29
Return Instruction
The LSI53C875 can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, then it loads the
register with the contents of the
DMA SCRIPTS Pointer Save (DSPS)
register. That
address value becomes the address of the next
instruction.
When a Return instruction is executed, the value stored
in the
register is returned to the
register. The LSI53C875 does
not check to see whether the Call instruction has already
been executed. It does not generate an interrupt if a
Return instruction is executed without previously
executing a Call instruction.
If the comparisons are false, then the LSI53C875 fetches
the next instruction from the address pointed to by the
DSP register and the instruction pointer is not modified.
Interrupt Instruction
The LSI53C875 can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, then the LSI53C875
generates an interrupt by asserting the IRQ/ signal.
The 32-bit address field stored in the
register can contain a unique
interrupt service vector. When servicing the interrupt, this
unique status code allows the Interrupt Service Routine
to quickly identify the point at which the interrupt
occurred.
The LSI53C875 halts and the
register must be written to start any further
operation.
Interrupt-on-the-Fly Instruction
The LSI53C875 can do a true/false comparison of the
ALU carry bit or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and